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Re: Routing nets connected to a plane/copper pour

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When using a plane/copper-pour layer is it necessary to physically route the connections attached to that plane ?  I.e., I am using a copper pour layer connected to the net 'GND'. I have many components which are connected to the 'GND' net. I routed some of these GND connections, however, when I go into 'Verify Design', I am getting many (para-phrased) 'Error, Subnet of net 'GND' I feel this may be due to the fact of these individually routed 'GND' net connections.

You need to Pour any copper ares before you run connectivity checks, and if that pour is able to reach all PADS, and attach thermals, then you will get a connectivity pass. If some pads are un-reached by pour/thermals., you get a connectivity fail ("Subnet.."

 

In some cases with tight areas, you may need to physically route the connections a short way to a reachable plane area.


Re: Error on generation of Cadence Allegro 15.Xx netlist generated from DX designer

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OK. we can not modify the symbol. But I could generate the netlist for PADs with 0 Error and many warning like below

======================================

Warning 6113: Device 184-0518-070 has 0 shapes

=====================================

Can you please tell me which property should I modify to point the PCB foot print of each component. How to add the PCB footprint name.

 

A flow of dxdesinger to PADs layout flow idea..

 

-

Thanks!

Re: Removing an old board outline

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I am currently working on a board design that started out one size of Board Outline, then got changed to a second a different size. On the design screen I see the second - and, correct - board outline. However, when I go into 'Create PDF' I see both the old and new Board Outlines. Just in case this was an image artifact I went into CAM and created some artwork. The 'old' board outline also appears there.

 

Can someone point me in the direction I need to go to remove all remnants of the 'old' Board Outline ?

It is not possible for PADS to have 2 Board outlines, but what can happen, is import of a new outline is flipped over to 2D polyline (usually with a message.)

If you want to use a newly created/imported  2D closed polyline as a Board outline, you need to first select shape on the old board outline, delete, then select shape on the 2D polyline and change it to a Board Outline. This new outline is then used for clearance checking, zoom etc.

Re: Removing an old board outline

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Hi Jim,

 

You are correct on the single 'Board Outline' issue; i.e., we can't have more than one outline. I didn't describe my issue very accurately.

The 'second' board outline I was referring to was actually the Board Outline *after* re-sizing the original, i.e., same Board Outline, just a different size.

Actually, after further investigation today and turning things 'on' and 'off', Temp_PCB_Page_1.jpg it turns out that what I am seeing in 'Create PDF' and also in the generated CAM document is *leftover* hatch from the *original size* Board Outline. For example, similar to my first submission, when I 'Create PDF' with 'hatch' unselected and 'pour outlines' selected, when I look at the PDF I *do not* see this hatch artifact. If I select 'hatch' and unselect 'pour outlines' I see the remnants of the hatch for the original BO size.

 

I have attached an image. The four holes at the extremes of the image are on the hatch layer associated with the original BO size. The resized BO can be seen along with it's four mounting holes at the bottom of the board. This problem, i.e., leftover hatch exists for both the top and bottom layers.

 

So while this isn't directly my original problem, it is related in that the leftover hatch is that which went with the original BO size.

 

Then, question is, 'How do I delete this residual/leftover hatch' ?

 

Regards,

 

Jim

Re: Different width/gap on the same layer for Differential Pair

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Hi David,

 

I almost have everything to finish the board.

 

I was able to configure the spreadsheet. I had to in PADS Layout set High-Speed roules for my + and - signal from differential pair.

I can now see in Net Length Monitor estimated and routed length (not sure why there are both). My previous question with the

accordion works great and I am able be using Interactive Route to add it.


Another two questions:

1. I can change one signal, how to switch into differential pair mode and add lenght to both signals ?

2. For measuring the length of traces out of the connector with the added accordion I would like to use QL command.

So I could see how good they are matched after the connector to some point close to it (i.e. next turn or trace split?). How to do it in PADS Router.

I of course considered using the whole routed lenght, however let's assume that I have the same issue on the other side, so I couldn't say that I'm matching difference both from this side of the connector and the other one.

 

Best,

Pawel

Re: Removing an old board outline

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Hello,

 

Turns out that for whatever reason, data for my Top and Bottom Copper Pours associated with the original Board Outline were still hanging around even after I resized the Board Outline *and* both pour areas. After some investigation, I just decided to delete both of these and re-poured them. Problem solved.

 

Thanks, Jim G. for weighing in, and thanks to all who gave this some thought.

 

Jim W.

 

P.S. Am using PADS 9.3

Re: Different width/gap on the same layer for Differential Pair

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1. I don't think you can. If you delete the segments, then the router can go into diff. pair mode by selecting the connection. Otherwise, this is where you need to play with the stretch command. In that mode, you can move one of the routes towards the other, the diff. pair spacing is maintained, and you can adjust the length depending on which direction you stretch. You can also route one half to the needed length, then the other half to get close, and use the stretch command to push them back together. This can also affect the rest of the routing if you're not careful, so protect the sections you want to keep.The move command does not work here.

 

2. Set the spreadsheet view to look at pin-pairs.

Re: Different width/gap on the same layer for Differential Pair

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Hi,

 

I have selected scheme "Pin pair length monitor", and if I manually select both nets

using pin pair filter, it shows me the same as net length monitor.

 

What am I missing?


Re: Removing an old board outline

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After some investigation, I just decided to delete both of these and re-poured them. Problem solved.

 

Good it is sorted,

Usually a re-flood regenerates any pour polylines & I've never seen ghost effects like that, but you are safe to delete them if they occur, as PADS regenerates that information from original master outlines.

Re: Different width/gap on the same layer for Differential Pair

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Reread where I talked about rescheduling. If you added a new pin to the net, then the pin-pair is probably one for the original net, source to load, and a new one from one of the ends to the new pin. This can be true even if you've routed this with the new pins in the middle. You need the pin-pairs to be from the source to the new pin, and from the new pin to the load.

 

Open Project Explorer, and go down to the Nets section and select the net. Expand it to see the pin-pairs. I'm guessing that in your case, if you select one, the whole net is highlighted, and if you select the other, just the trace from one end to the new pin is highlighted. Pin-pairs can share the same trace.

 

Unfortunately, it is sometimes necessary to unroute part or all of an existing trace for rescheduling to work. Sometimes the trace seems to protect the pin-pair assignment and prevents the reschedule command from working.

Re:  PADS Professional and Xpedition VX.1

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Hi Robert,

 

Thank you for your reply. I appreciate it very much.

However, I encounter a license error when I try to use the import/export EDX.

I am using the xDM Librarian 100.

Re: Error on generation of Cadence Allegro 15.Xx netlist generated from DX designer

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PKG_TYPE is used for the footprint.

Re: REPORT BUILDER GUIDANCE

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Hello Patrick-Hackney,

 

Together to the request-opinion from Frank, I'm wondering if I can add to the Reports User properties from the project or the Design, I was trying to guess if I can do it, but I couldn't find it, no problems with devices properties but no way with design or project properties.

 

Cheers,

 

David

Re: I want to modify the Part List Exclude in the Property Definition Editor in PADS 9.5

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No we have no plans to modify this, most people adopt Variant Manager if they want to do something more sophisticated than a simple exclusion from the parts list.

Re: Regarding CCZ Export for Layout in Expedition

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It seems ExpeditionPCB run out of 2G memory.

yanfeng


Using X2Y Capacitors in HyperLynx PI

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Hi,

 

How can I model X2Y capacitors in HyperLynx PI (Boardsim)?

 

Regards,

 

Charl

Re: Information about the CCI-SCRIPT.txt file that is used to generate CCI database from SVDB?

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Hi Zhixin,

 

The descriptions of those commands are in the Calibre Query Server Manual in the "Annotated GDSII File Commands" section. They add property values to various objects in the AGDS output and all default to 1. If you don't use such properties, you can omit the commands from the script.

 

dan

Re: Error on generation of Cadence Allegro 15.Xx netlist generated from DX designer

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Yes, You are correct.

 

I was able to generate the .tel and devices files after resolving all the error. But while importing it shows me below error,

==============================

! '705-3215-260' ! '100k' ;  R467

                            ^

ERROR(SPMHNI-67): Cannot find device file for '705-3215-260'.

-------------------------------------------------------------------------------

! '351-6804-610' ! 'TPS53316RGTT' ;  U46 U45 U47

                                    ^

ERROR(SPMHNI-67): Cannot find device file for '351-6804-610'.

-------------------------------------------------------------------------------

========================================================

 

But my devices for resistor is as below,

 

========================================

(Device file for RES-H)

CLASS IC

PINCOUNT 2

PINORDER RES-H M P

PINUSE RES-H BI BI

FUNCTION G1 RES-H 2 1

PACKAGEPROP VALUE VALUE

END

=======================================

 

here "705-3215-260" is part no,

100L = value

R467= ref des in .tel

 

while RES-H is symbol name. Foot print name is "040X020S2" which is not showing in .tel file and also there is not any link between .tel and device file. I think my configuration file has problem.

 

can you please suggest the changes needs to be done in allegro.cfg file for proper linking of .tel (having = footprint) to device file show the error can be removed?

 

2) And another error is extra exclamation sign. can you please suggest the changes to remove it ?

ERROR(SPMHNI-62): Expected '!' before device, line ignored.

-------------------------------------------------------------------------------

R76 R74 R34 R36 R49 R28 R45 R1717 R65 R46 R33 R417 R69 R71 R35 R70 R56 R68,

Pads show up as hatch, WHY???

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On bottom layer of my board I have 2 components (large ~0.5" pads for battery contacts).

I also have text "LAYER 2" with width of 0.020"

When I got to generate gerbers the battery pads show up as hatched area, why....? They should be completely solid, they are nothing but a rectangular pads, not fills / floods...

If I change the "LAYER 2" text width to 0.001 or get rid of the text all together, the pads show up correctly.

 

Can somebody explain what is going on? I've looked through all of the CAM settings and can't find anything that will make sense. It's like PADS picks 0.020" thick pen for everything on that layer if "LAYER 2" text is at 0.020

 

 

BadPads.jpg

 

GoodPads.jpg

Thank you,

 

Boris.

Re: Pads show up as hatch, WHY???

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Check your hatch grid setting in <Tools><Options>(Grids and Snap - Grids tab).  It looks like you have it set to about 40-50 mils. 

 

From the help page:

 

Tip:Copper, copper pour, and plane areas are filled with lines on the hatch grid. When the Drafting option Default width matches the Copper hatch grid, the result is a solid. When the default width less than the grid value, the result is a hatch pattern.

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