Re: Loss of relationship between differential pairs
Hi all,The design which I have the problem says that HSR is not available. But when I start a new design differential lines can be be routed. In those I can not find Setup > Licensed Modules >...
View ArticleLinking in vesys 2.0
Hi everyone!I'm new to the vesys software, and I'd like to know if it is possible to link files (PDF, JPG etc.) in the wiring diagram, or harness? I'm thinking of a simple link, beside the connector...
View ArticleIsolation information
Hi everyone! In the harness design if I make isolation to bundles, I have absolutely no information about them. The Infohub says isolation tables should exist, and customizable in the style sets menu....
View ArticleAltium Designer to Mentor graphics expedition VX.1 PCB design
Hello, I tried following recommendation how to translate pcb design created by using Altium Designer into Expedition VX.1:How to translate a Altium Designer Project to Expedition PCB? Now, I have...
View ArticleBER
Hai I am having ibis model of a ethernet phy and a copper sfp module placed after a distance of 2 inch i need to perfom biterror rate and bathtub simulation for studying the channel is there any...
View Articlefast eye analysis
hai what is the difference between fast eye analysis and eye diagram analysisregardsagxin.j
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Re: Isolation information
Hi Laszlo, In your Style Set, expand Design>Decorations and select Tables. Then select the green + button at the top to see the Tables available for selection.After you've added the table in VeSys...
View ArticleRe: How to use paste from layout clipboard in VX.1
In Xpedition VX.1, Copy Circuits is native within the Selection Mode. Select your Circuit, and Control+CGo to your other design and Control + V It is as simple as Copy and Paste in a MS Word Document....
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DC2DX Library & Schematic Translator Issues
HI, I am trying to translate our library from DC to DX in 7.9.5 and I am having an issue with some of the parts not translating correctly. I am also try to translate a schematic over to see what issues...
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Re: identify every instance in netlist from Layout
What tools and versions are you using?
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Re: Checklist updation of ERF in Valor
hi,sabitha:I'm afraid i cann't catch your meaning very well, perhaps you may describe it more detail with it's better with some figure to tell the issueEspecially the dialogue"when running the file...
View ArticleRe: identify every instance in netlist from Layout
Hi Samantha I have converted netlist files into schematic in Cadence Virtuoso version IC6.1.5-64b. Please let me know through which tools and version it could be done and how. I will try to get that....
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Re: Isolation information
Hi Lisa! Thank you for the answer, it was really helpful. The "add" button was the one I couldn't notice.
View ArticleRegisterErrorExpression 오류 문의 드립니다.
HyperLink를 사용하기 Message Window 구문에 Call outTab.RegisterErrorExpression(sRCCPattern, ScriptEngine, "vFunc", "fFunc") 구문을 추가 하였습니다. 이때 vbs로 실행 할 때는 정상 동작 하지만, efm에서 실행 할 때는 아래와 같은 에러가 발생 합니다. 형식이 일치하지...
View ArticleHow to assign all unassigned pins to signals in IO Designer?
Hi all, In IO Designer after importing the UCF file, only one pin is assigned to signal from power and ground group.Remaining pins are in unassigned pins list. What is the easy method to assign all...
View Articlehow to create custom off page symbol in pads logic ??
i need to create custom off page connector symbol in pads logic and let me know what is mean by logic icon while creating library ??
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Sub-component problem
Hi! I've made a sub-component for a connector. The component (which I use as a sub-component in this case) has a symbol attached to it (and the symbol has the same name as the component of course)....
View ArticleRe: how to create custom off page symbol in pads logic ??
Off page connectors are defined in the $OSR_SYMS part type found in the Common library unless you've moved it to your own library. 'Logic icon' refers to any PADS Logic symbol in the library that...
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issue in Library part creation in pads logic ??
Hi everyone,i created CAP part type which contain CAP_0402 and Alternative part is CAP_0603.For CAP_0402 symbol i assigned 0402_1 and For CAP_0603 symbol i assigned 0603 decal.while importing netlist...
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