Re: identify every instance in netlist from Layout
I would use nmLVS with some HCells to define correspondence points, and crossprobe results using RVE and DESIGNrev. (All part of the Calibre suite, as that is what I work with here at Mentor.) I did...
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Terminal Specs
Hello everyone, Quick question with regards to wire terminals. We are using the generative design method. In my Integrator design, I am assigning a terminal material spec to each wire (SN). When I...
View ArticlexDM Library and xDX Designer issue
When I'm creating the top module in xDx Designer, there was an error "No part data.No Part Number, Part Name, nor Part Label has been entered.Please enter some data to enable packaging" I went back to...
View ArticleRe: xDM Library and xDX Designer issue
Do you have 'Flag out of date symbols' enabled in DxDesigner (Settings - Advanced). With this option set the symbols to be updated should be highlighted on the schematic, then you use Tools - Update...
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how to generate route file in Pads layout ??
Hi,How to generate route file for oval slot and Rectangle Drill in pads layout 9.5 and what is augment in drill chart ??
View ArticleRe: how to generate route file in Pads layout ??
Augment means 'add a symbol for each drill size that doesn't have one defined in the current table'. Regenerate means 'delete the existing table and make a new one'.
View ArticleRe: how to generate route file in Pads layout ??
Thanks Jduquette,In allegro for oval slot and rectangular drill route file will be generated (for x and y cooridinate as well as drill center ) like that how to generate ??
View ArticleRe: how to generate route file in Pads layout ??
Draw a board outline, and then select the 'board outline' tool again. It will warn that the outline already exists and ask if you want to generate a cutout. Proceed to draw the shape defining your...
View ArticleRe: identify every instance in netlist from Layout
I think you could benefit from a post to this same group just a couple of items down from this one: How to highlight a net by name with RVE after LVS The title may mention highlighting nets, but the...
View ArticleRe: Sub-component problem
Hi Lac From what I can see in VeSys you can place the table as you have stated.Housing Definition serves as a method of preparing what Additional Components may be added to the component.Which means...
View ArticleRe: how to generate route file in Pads layout ??
Thanks for your answer.But my question is for slot that is we can generate route file in allegro (.rou). like that any option is available in PADS ??Please reply for this question because cut out slot...
View ArticleRe: xDM Library and xDX Designer issue
Hi Robert,Thanks for the solution. It worked for the new components to be placed. But, for the already placed parts, it didn't work. (Let me explain it.I created a part (LED) and placed it. When I...
View ArticleRe: xDM Library and xDX Designer issue
If you are using DxDataBook with an associated part database then do a Live Verification to find parts that don't have the required properties and update from there. Otherwise a combination of Find/ to...
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Re: Sub-component problem
Hi Pat Thank's for your help! I will try the SupportNet then, because I've found an older design, (what was made by a former employee of the company) and when I import it into VeSys the related part...
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Re: Sub-component problem
Hi LacPlease do log and SR and supply the sample so that it may be examined.If the old Styleset is available as well that may help them, as well as your own SystemData.xml which will contain the...
View ArticleRe: Support for backtraces in ARM NONE EABI toolchain (bare metal)
Many thanks to james_patterson for pointing a correct answer, quoted below:You will want to look into using _Unwind_Backtrace. Be sure to add #include <unwind.h> to your source fileBe sure to...
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Re: how to create custom off page symbol in pads logic ??
hi thanks for your reply.i am trying to create off page connector.if i trying to create in Parts (like symbol creation path)it is not creating .i could not add symbolor else is it possible to convert...
View Articlewhen iam opening the created wlf file iam getting below message
assertions]% Reading pref.tclWLF file vsim.wlf contains no context information. Hi, When i am simulating below code iam getting the message above and waveform is not getting opened.It would be really...
View ArticleRe: how to create custom off page symbol in pads logic ??
Click the button and then read the page about ‘Creating New Special Symbols’.
View ArticleRe: how to create custom off page symbol in pads logic ??
i could not understand which botton i need to click
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