unless I misunderstood,
you just go into the EDITOR CONTROL dialog,
and under the ROUTE tab
click LAYER SETTINGS
and then clear the checkboxes for everything except your surface layers
Jack
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Re: Autorouter, how do i specify it to route on only top and bottom of board in a certain area of the board
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Re: DxD Tools/Verify drc-002 rule "values" format
the ~? mark say 1 of these at the start or none at the start. In old versions we didn't see (maybe didn't allow?) partial negation, so only at the start made sense.
The position of the last dash is what says it isn't a range character, I'm not sure where I found that info, but my notes say "don't move this or it becomes a range indicator".
The defaults have changed/improved over several releases and are quite different in the VX.1.1 versions.
^(((?!((\d+\:\d+)|{.*}|[@'\\<>*,;])).)*)?$ -- you can see it is very different and uses some RE shorthand that I believe is covered in the RE section of the doc. It also has separate check for buses.
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Re: Autorouter, how do i specify it to route on only top and bottom of board in a certain area of the board
Jack,
Thanks. That makes sense.
Ken
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Re: Assigning pin numbers to multiple pins
Hi Rehan,
Thanks for your reply.
Yeah I figured that out after posting this question. It works fine.
It still would have been a lot easier if the copy paste worked .
Regards,
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Re: Assigning pin numbers to multiple pins
Hi Robert,
Thanks for your comment. I will try what you suggested. So far I think "Generate Symbol from pins " option looks good.
Regards,
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Re: USB Dongle Occasionally not detected
I recommend making sure your license environment is as clean and as streamlined as possible. This means removing any redundant license sources from the MGLS_LICENSE_FILE/LM_LICENSE_FILE environment variables and registry settings. You really only need the MGLS_LICENSE_FILE environment variable to run PADS. Everything else just has the potential to slow things down. The Mentor License Utility or Mentor Install Program have functionality to help edit these settings:
http://supportnet.mentor.com/files/member/licensing/Mentor_License_Utility.zip
http://supportnet.mentor.com/portal?do=releases&prod=C106-S128-G159-P11292
Also, inspect your license file and remove any licenses that do not match hostids on your system (i.e.: Only have ones matching your dongle ID.)
Finally, you might consider updating to the latest dongle driver. If you download the licensing software (http://supportnet.mentor.com/portal?do=releases&prod=C106-S128-G159-P11292), you can update the drivers from within the installer under Manage Licensing.
Guy
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Re: Pads show up as hatch, WHY???
The hatch grid is set to 1, but hatch should have no effect on this pad.
The two rectangles are components with a single pad decal. The footprint should always show up as solid and not hatched sine a part will be soldered on top.
PADS will shift from Flash/Drag plotting, to copper fill in some situations (eg spin a std SMD part 45' (non orthogonal), and it changes to copper fill)
I think you may have triggered that plot-change, either with the unusually large size, or maybe the radius corners ?
Once you change to copper-fill, there is a PAD Fill Width number in CAM & with Augment on the fly ticked, it seems to auto-scale the PAD Fill stroke grid when I change Fill-Width.
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Re: Anyone else migrating from Logic to xDxDesigner?
Hi Pete,
which attributes do you need to transfer?
I just tried to import Logic Design to xDXD and all Part Attributes from Logic are listed in Properties in xDXD. I used File - Import - PADS in xDXD. It created a new partition in Central Library named after first sheet of the Logic design.
But another issues occurs. I think it relates with the problem around pins you mentioned before in this discussion. Currently I am stuck with this:
ERROR: Cell "SOT23" of Part "TL431BFDT" specified a pin
number "1". The same cell was previously defined
on part "BAV99_NXP_SOT23" with this pin as "A".
Cells with the same name must have identical pin numbers.
Although these two parts no longer have the same decal Packager refuse to transfer it to Layout.
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Re: Anyone else migrating from Logic to xDxDesigner?
Pete, Radek, FYI - I've moved this post to the PADS Schematic Design sub-community for greater visibility to folks interested in front-end design. - Cathy
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Re: Anyone else migrating from Logic to xDxDesigner?
My Logic library uses PART NUMBER, PARTS DESC, VALUE1, VALUE2, VALUE3 attributes. They do transfer with the Migration.
xDx has system properties for Part Number and Value2.
Now many of my Part Type names in Logic are the same as the PART NUMBER attirbute. So now in xDx, I get a PART NUMBER, Part Number, and Part Label, all with the same value. The Value2 property doesn't pick up any value, so at least I only get 1 of those. The problem appears to be that my Logic attributes are assigned to the part in xDx, the xDx properties are assigned to the symbol.
The Mentor guys are looking at it. After all the things they got fixed in v1.1, I'm hoping 1.2 gets more. I don't think Central Libraries will truly work like they had hoped unless they can change the library structure to the PADS Flow structure, where symbols and footprints carry nothing but graphics, and all of the part info is in the actual Part Type. If they are able to use the xDx structure (part info in the symbol) with the PADS structure in Layout, it shouldn't be all that difficult to change.
On to your pins issue: In Logic, you create Logic symbols with no pin names or numbers and let the Part Type assign them as needed. So in one part, the first pin could be named "EN". In another part, it could be "SHDN". In xDx, all part info is defined in the symbol. So if you build an "EN" ,you can not use it with a part that requires different info. You need another symbol that looks exactly identical, but has different info. My Logic library had 1 AOPAMP symbol, used on dozens of parts. Now, because a couple pin names needed to be different, I have 6 AOPAMP_nnnn symbols. I'm guessing you have SOT23s defined in more than one partition, with different pin names. You will have to rename one of them.
Pete
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I/O Designer will not update
I'm running into a problem with I/O designer, where it will not update the FPGA libraries via the Internet. I've had this issue since the last time I used IOD back in February, and I ended up with errors on some pin labels, because I chose to ignore the fact the IOD was not updating from the internet, so I don't want to make that mistake again. Here is the error log of the updater:
Current version of I/O Designer IOD9.5
Current version of library 095_000_001_010
Using server http://supportnet.mentor.com/productupdates/
Downloading manifest file http://supportnet.mentor.com/productupdates/public/iod/libraries/IOD9.5/update.xml
Manifest file : http://supportnet.mentor.com/productupdates/public/iod/libraries/IOD9.5/update.xml was downloaded successfully to path C:\Users\TDesmit\iod_updates\update.xml
Loading manifest file C:\Users\TDesmit\iod_updates\update.xml
This is an older version of IOD, but I don't have a choice on that; since IOD is now bundled with Expedition Enterprise, and we cannot move to vX because it breaks all our automation, I'm stuck with this version. If I can't get this version to update, I guess I will not be able to use it, because after getting burned in February, I won't let that happen again.
I'm trying to use IOD in "librarian" mode, to generate some generic symbols for a 896-pin Altera part.
Anyone have any ideas on why this is refusing to update?
Thomas DeSmit
Cobham AvComm (formerly Aeroflex)
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Re: I/O Designer will not update
One more piece to this puzzle: The following error dialog box comes up when I try to run the update:
"Could not load data from manifest file: C:
\Uses\TDesmit\iod_updates\update.xml
Updater will be closed. You can read details in the log file:
C:\Users\TDesmit\iod_updates\log\2015-08-26-07-33-41.log
The text in the initial post is the text of that log file.
Tom
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Re: Anyone else migrating from Logic to xDxDesigner?
The idea of the Central Library is to be part driven, the symbol needs pin names but not numbers, they're assigned via the packaging process, so you can share common symbols (only need one instance of the symbol). We're working on this in the translators but not before VX.2. VX.1.2 will have further improvements to the translation process over and above what we did for VX.1.1.
As I mentioned in another post, the current central library structure isn't quite right but in essence it should (eventually) work in such a way as you require, symbols being graphics only (with pin names) and packaging information held in the Part information - it is exactly how it works in the Xpedition flow.
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What happened to "ask the expert" ?
I posted a question a short time ago, and I wanted to post it in one of the "ask the expert" forums, but they don't seem to exist any longer! Not even a re-direct, or explanation of what a user should do if they follow a link such as this one:
http://communities.mentor.com/community/pcb/expedition/ask_dxd_expert?view=overview
Clicking on this will now take you to a "page not found"
I realize that things change, but at least have some type of re-direct in place, so people are not sent to a dead-end. This also brings up the question; what happened to all the postings that were listed under this forum?
Thanks,
Thomas DeSmit
Cobham AvComm
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Re: Anyone else migrating from Logic to xDxDesigner?
Robert, that's good to hear. But one nit to pick - if the symbols require pin names, they aren't graphics only, and I'm still stuck with 6 AOPAMP symbols.
It might be that I'm just too comfortable with 25 years of Logic use, but I really think that library structure is the best of any of the EDA systems. When I started with Boardstation, I never understood why anyone would want to bother with packaging, it made no sense. If all the information was in the library, why wait until AFTER the schematic was done to assign it? It's all there, it's not going to change from the time it's built in the library until the board is sent to CAM. Why should it need to be "packaged"? So as soon as I started with Logic, I was happy to see that someone understood that. Working Logic alongside other systems just make me wonder why every time I have to run a packager on the other systems.
Sorry for the rant, I know those kind of decisions aren't made by one person. I really do appreciate all the efforts Mentor is making on this.
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Re: Anyone else migrating from Logic to xDxDesigner?
If it's a generic OpAmp symbol then all of the symbols can use the same pin names, I've done it this way for too many years to admit, it just takes some upfront planning to determine what is needed. In PADS Logic (which I don't use), how do you define a pin to get it mapped to a name and number?
As for packaging, it depends on how smart you need to be, going back a long way you'd have lots of logic distributed across multiple pages of design, the packaging process would optimise this for you down to the minimum number of gates. In recent times we've added other options in Xpedition to provide symmetric packaging of replicated hierarchy for people doing redundant design (Aerospace etc). But I understand your point about post-schematic packaging, why not package on-the-fly.
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Re: Autorouter, how do i specify it to route on only top and bottom of board in a certain area of the board
Hi Ken,
Also you can control which layers to permit routing using CES. That way you can control them by Net Class. In addition, find the Layers column in the AutoRoute dialog. There you can control layer usage by Pass Type.
Get in touch w/me if you want to go over this a little more.
Mike Dauphinais
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Re: Expedition - How do I select and move a bunch of components over on the PCB to make room for a component I forgot to place
Ken,
Be sure and go through the Editor Control. There are part "shoving" and glossing options that may help.
Mike
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Re: Expedition - How do I select and move a bunch of components over on the PCB to make room for a component I forgot to place
Mike,
Thank you.
Ken
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Re: What happened to "ask the expert" ?
Thomas – thanks for your note, and I apologize for the inconvenience. When we migrated our communities to a new version in September, 2014, we did have re-directs in place. My suspicion is those may have had some sort of time limit on them (6 months maybe) that has since expired.
At the time of our migration to a new version, we also took that opportunity to do a lot of clean-up/re-structuring in the communities. One of those changes resulted in the “Ask the Expert” communities to be re-assigned to communities grouped around functional aspects of design. As a result, the “Ask the DxDesigner Expert” community was absorbed in the Xpedition Enterprise Design Creation community.
That community can be found here: https://communities.mentor.com/community/pcb/xpedition/design_creation
Again my apologies. Please let me know if you have other questions.
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