Re: Script to extract design rules from Pads Layout
Ben, thank you for the tip. I totally overlooked that button, however it doesn't give me what I want. It gives me the same list as the Export Rules option, just in a table form, which granted makes...
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I need to design 2 identical blocks in uXD
Hi i started new design in VX1.1 DXD i have to identical blocks with same components and same internal connections but any block get power supplies from saperete power supplies block: the problem is...
View ArticleRe: I need to design 2 identical blocks in uXD
Globals cannot have different instance values so you will need to bring the nets up to the top level and then add the required global nets at this level. Sent from my HTC
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ERF Pin to Hole Ratios
Hello is there anyone out there who has mastered the art of Pin to Hole ratio in the form of an ERF rule who would be willing to share them. I am also willing to listen to ideas.
View ArticlePADS 9.5 on Windows 10?"
Microsoft keeps reminding me that I should upgrade to Windows 10. Any info on how 9.5 tools work on Win10?
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Re: Customizing reports in harness
Sharath, You can customise the connector table in harness drawing through style set if your using vesys 2.0.Find the below image for you reference. You can add row for the connector through...
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How to add Image in Vesys 2.0
Hi, As we are doing migration from Vesys classic to Vesys 2.0, we need to place the image in 2.0 drawing. But if we add the image in one drawing through add image option, it is not visible in...
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How to shoe total number pins in connector in Vesys 2.0 schematic
Helo, As am working in schematic style set alteration I want to show total number pins in a connector. And it should called from vesys component library. I have tried this option to show number of...
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Remove thermal Override.
Hi all , I am working with Tie legs, ther is no problem to change and modify it , but sometimes i need to reset or "Remove thermal Override" and i can't do it .Useless --> UsePadstackThermalDefaults...
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How to show node to node dimension in vesys 2.0 Harness & dual dimension option?
Hi, As per vesys classic input we would like to show node to node dimension, We don't want to show major dimension, we want to show only point to point distance information. I tried to control...
View ArticleRe: Remove thermal Override.
Found WorkAround Call pcbAppObj.Gui.ProcessCommand(33672,True) 33672 - it's ID command for "Remove thermal Override" *** Be noted : do not Call it inside/after pcbDocObj.TransactionStart . It's...
View ArticlePut tape over device integrated in the harness (Vesys)
Hello all, I had a harness designed with diodes integrated in the harness bundle. I am not sure of option to tape the diode individually inside the conduit(tube)? is that any way I can do it in Vesys?...
View ArticleRe: Put tape over device integrated in the harness (Vesys)
Hello, You can add a Spot Tape on the Device Node and it gets linked to the Node i.e. on a particular Node you will have a device and a Spot Tape. Steps 1. Add a Device on the Bundle2. Add the Spot...
View Articlepackager Errors
during packager with capacitor with puins type terminal i gotError: BAD DATA for Part number:xxxxall my passive components are configured with type: Terminal all are with same error so i cant package...
View ArticleRe: packager Errors
we have more than1000 capacitors and resistorsin order to change it i need to delete all PDB, change the symbol and than assign new PDB to each its somthing like 3 days work you can not change pin type...
View ArticleRe: packager Errors
Unfortunately you don't have many options if packager won't accept pin types of terminal. You could try using the Advanced Library Editor to perform this kind of bulk change.You can it here Advanced...
View ArticleRe: Grey out Selection of 'Integrated Project' for PADS Standard License
You should post this on Ideas - that's where we in Mentor look for enhancements user's would like to see in the product. Mentor Ideas for xDX Designer
View ArticleRe: Calibre nmLVS with custom plate capacitance. How to ignore cap in schematic?
Another way to consider this is to decide if you want to check and confirm the existence of this special capacitor or ignore it. Sounds like you added polygons to achieve capacitance effect in the...
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