Another way to consider this is to decide if you want to check and confirm the existence of this special capacitor or ignore it. Sounds like you added polygons to achieve capacitance effect in the layout but may not have a "DEVICE" statement in the rule file that would actually recognize this as a capacitor device in the layout. You've added a capacitor device to the schematic that is being recognized during LVS.
If you want to check that the capacitor exists in both layout and source you may need to add a related DEVICE statement to your rule file.
If you want to ignore the capacitor device from the schematic netlist during LVS then LVS FILTER could be what you need as Sam mentioned earlier.