Re: Routing nets connected to a plane/copper pour
When using a plane/copper-pour layer is it necessary to physically route the connections attached to that plane ? I.e., I am using a copper pour layer connected to the net 'GND'. I have many...
View ArticleRe: Error on generation of Cadence Allegro 15.Xx netlist generated from DX...
OK. we can not modify the symbol. But I could generate the netlist for PADs with 0 Error and many warning like below======================================Warning 6113: Device 184-0518-070 has 0...
View ArticleRe: Removing an old board outline
I am currently working on a board design that started out one size of Board Outline, then got changed to a second a different size. On the design screen I see the second - and, correct - board outline....
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Re: Removing an old board outline
Hi Jim, You are correct on the single 'Board Outline' issue; i.e., we can't have more than one outline. I didn't describe my issue very accurately. The 'second' board outline I was referring to was...
View ArticleRe: Different width/gap on the same layer for Differential Pair
Hi David, I almost have everything to finish the board. I was able to configure the spreadsheet. I had to in PADS Layout set High-Speed roules for my + and - signal from differential pair.I can now...
View ArticleRe: Removing an old board outline
Hello, Turns out that for whatever reason, data for my Top and Bottom Copper Pours associated with the original Board Outline were still hanging around even after I resized the Board Outline *and* both...
View ArticleRe: Different width/gap on the same layer for Differential Pair
1. I don't think you can. If you delete the segments, then the router can go into diff. pair mode by selecting the connection. Otherwise, this is where you need to play with the stretch command. In...
View ArticleRe: Different width/gap on the same layer for Differential Pair
Hi, I have selected scheme "Pin pair length monitor", and if I manually select both netsusing pin pair filter, it shows me the same as net length monitor. What am I missing?
View ArticleRe: Removing an old board outline
After some investigation, I just decided to delete both of these and re-poured them. Problem solved. Good it is sorted,Usually a re-flood regenerates any pour polylines & I've never seen ghost...
View ArticleRe: Different width/gap on the same layer for Differential Pair
Reread where I talked about rescheduling. If you added a new pin to the net, then the pin-pair is probably one for the original net, source to load, and a new one from one of the ends to the new pin....
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Re: PADS Professional and Xpedition VX.1
Hi Robert, Thank you for your reply. I appreciate it very much. However, I encounter a license error when I try to use the import/export EDX.I am using the xDM Librarian 100.
View ArticleRe: Error on generation of Cadence Allegro 15.Xx netlist generated from DX...
PKG_TYPE is used for the footprint.
View ArticleRe: REPORT BUILDER GUIDANCE
Hello Patrick-Hackney, Together to the request-opinion from Frank, I'm wondering if I can add to the Reports User properties from the project or the Design, I was trying to guess if I can do it, but I...
View ArticleRe: I want to modify the Part List Exclude in the Property Definition Editor...
No we have no plans to modify this, most people adopt Variant Manager if they want to do something more sophisticated than a simple exclusion from the parts list.
View ArticleRe: Regarding CCZ Export for Layout in Expedition
It seems ExpeditionPCB run out of 2G memory.yanfeng
View ArticleUsing X2Y Capacitors in HyperLynx PI
Hi, How can I model X2Y capacitors in HyperLynx PI (Boardsim)? Regards, Charl
View ArticleRe: Information about the CCI-SCRIPT.txt file that is used to generate CCI...
Hi Zhixin, The descriptions of those commands are in the Calibre Query Server Manual in the "Annotated GDSII File Commands" section. They add property values to various objects in the AGDS output and...
View ArticleRe: Error on generation of Cadence Allegro 15.Xx netlist generated from DX...
Yes, You are correct. I was able to generate the .tel and devices files after resolving all the error. But while importing it shows me below error,==============================! '705-3215-260' !...
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Pads show up as hatch, WHY???
On bottom layer of my board I have 2 components (large ~0.5" pads for battery contacts).I also have text "LAYER 2" with width of 0.020"When I got to generate gerbers the battery pads show up as hatched...
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Re: Pads show up as hatch, WHY???
Check your hatch grid setting in <Tools><Options>(Grids and Snap - Grids tab). It looks like you have it set to about 40-50 mils. From the help page: Tip:Copper, copper pour, and plane...
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