Clik here to view.
How does one create a PCB fab drawing with notes and title blocks?
Hi, We are finishing up our first project in xDX designer and PADS Layout VX.1. We formerly used PCAD and typically would generate a fab drawing like below: Where can I create a template to use like...
View ArticleShould the naming of sch symbols be in upper or lower case
What does Mentor suggest is the case size used for the naming of schematic symbols? Should they be in upper or lower case? In View draw we always used lower case. I'm starting to see symbol names in...
View ArticleParallelism DRC check
HiOn my last workplace I used parallelism rules set up in CES to check for crosstalk risks when using the DRC check in PCB expedition.At my new workplace I can set up the rules but there is no such...
View ArticleWhy impose PCB design constraints?
If you've ever found yourself asking this question, you may want to check out our new PADS blog series, which is devoted to exploring the benefits of a constraints-driven PCB design flow. Steve Hughes...
View ArticleRe: revision (or version) control
I keep my PADS designs (and an occasional DxD design) archived in Subversion (TortoiseSVN for Windows). I've heard people compare it to GIT.
View ArticleRe: How does one create a PCB fab drawing with notes and title blocks?
A few ideas to get you started: Once you create your titleblock in Layout (a DXF import might be helpful) you can save it to a library as a '2D Lines' object. I keep copies of my standard notes and...
View ArticleClik here to view.
Technology Leadership Awards '15 — submissions open soon!
Be among the first to know when the submission window opens for the 2015 Technology Leadership Awards by signing up at our TLA page on Mentor.com. You won't want to miss your opportunity to submit a...
View ArticleRe: Should the naming of sch symbols be in upper or lower case
Mixed case symbol names are supported if you area talking about the file name. Spaces and many special characters are not allowed. For the PADS flow, properties and property values that are...
View ArticleRe: Should the naming of sch symbols be in upper or lower case
Hi Gary, So I could name my transistor symbol “BJT_NPN” or “bjt_npn”, in my library and either way will work? I’m used to naming my symbols in lower case. It’s good to know. Thanks
View ArticleRe: How does one create a PCB fab drawing with notes and title blocks?
A couple of years ago we bought BluePrint-PCB to do our PCB documentation.It works pretty good. Especially if you need to handle multiple pages with title blocks and revisions on every page.It reads...
View ArticleRe: How does one create a PCB fab drawing with notes and title blocks?
I find it MUCH easier to export to a 2D CAD editor. Especially on boards that also need 3D assembly models. PADS just doesn't have the documentation power of a documentation program.
View ArticleClik here to view.
netlister updating PKG_TYPE
It appears that with the 7.9.x releases, netlister is now attempting to update the PKG_TYPE property. Our config file has setups to replace pin name specific decals (ex:SOT-23_EBC) with generic decals...
View ArticlePlugin help
Hi Simon (I'm assuming you will be the one looking into this), I've completed a plugin that reads net names from a csv file and compares the names to the selected nets in a design. If the names match,...
View ArticleRe: Plugin help
Hi John,I can't see anything obviously wrong with the code. However, the algorithm you are using is going to be VERY slow. For each line in the CSV you are looping through every net in every design in...
View ArticleRe: If multiple Gate IC want to display the Power Pin in a Gate ,how to do...
If you connect either power or ground pins to different supplies the packager will assign the gate to a different package as it sees it as a new part with different power requirements. If you have also...
View ArticleRe: Should the naming of sch symbols be in upper or lower case
You need to distinguish between the symbol name in the symbol definition file and the file on disk, in general (though not always the case) the file on disk is saved as lower case to ensure...
View ArticleRe: Plugin help
Thank you Simon. I suspected that may be the case. I haven't written code in a long time, so I'm fumbling my way through this trying to get back up-to-speed. I will definitely reconsider my algorithm...
View ArticleClik here to view.
Re: Should the naming of sch symbols be in upper or lower case
Hi Robert,Some times a picture is worth a thousand words.If the only reason symbol names are in lower case is to ensure compatibility between Linux and Windows than everything is right with the world....
View ArticleRe: Should the naming of sch symbols be in upper or lower case
I have symbol names that are a mix of upper and lower case. I also use DxDesigner automation. The ChangeComponent method has a problem with symbols with upper case letters in the name. It works fine...
View ArticleClik here to view.
A question of simulating diff pairs in HL
Hello Folks, I am stuck in a quiet simple and basic example.I would like to simulate a clock that is a differential clock. The topology is quiet simple, as it is visible in this picture. (Be aware that...
View Article