Re: Mass IBIS pin assignment
if you already got a project set up you should check if you can generate a project specific ibis model with the design software (like Quartus II (altera) and ISE Design suite (Xilinx))
View ArticleRe: Inline Preferred Signals
Hi John,Yes, you can identify a connector as refined. You use the method getConnectorRefinement() which will return 'null' if the connector is NOT refined. Otherwise it returns an object...
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Re: Mass IBIS pin assignment
I am using a actel FPGA, I have the IBIS file can I edit it so that it only uses 1 type of IO driver ? If so do I do it in hyperlynx ?
View ArticleRe: Exporting/importing EDIF schematic for backward compatibility in xDX...
This is a known defect planned for a future release (probably VX.2?). But there is a workaround... Use the commandline for mgswrite & mgsread. NOTE: You need to open a MentorGraphics CMD window...
View ArticlePADS Layout - is the CAM folder shared by all projects or should a CAM folder...
In PADS Layout is the CAM folder shared by all projects or should a CAM folder be created for each project?
View ArticleRe: PADS Layout - is the CAM folder shared by all projects or should a CAM...
Hello Dalton, I like to have different folders for different projects. In the bottom of Define CAM Documents dialogue select arrow down next the 'default' and select Create. Give the name of the...
View ArticleRe: PADS Layout - is the CAM folder shared by all projects or should a CAM...
Hi Yan, Thanks for the quick response. Regarding the Layer information used to Generate the Gerber files, does that get saved with the board (.pcb) file? Regards,Dalton
View ArticleRe: PADS Layout - is the CAM folder shared by all projects or should a CAM...
Yes. Once you define it save the Gerber setting and save *.pcb and it will be part of your database. Yan
View ArticleRe: PADS Layout - is the CAM folder shared by all projects or should a CAM...
You can also hit 'Export' on the Cam dialog box to save your Gerber settings in a text file. You can use 'Import' to bring this into other designs or it comes in handy if you want another way to tweak...
View ArticleRe: LMtools License Service is not looking at my specified Path to the...
Brian, You can check HKEY_LOCAL_MACHINE\SOFTWARE\Wow6432Node\FLEXlm License Manager for LM_LICENSE_FILE. Also, you can download the latest Mentor Standard Licensing release and once it's installed, you...
View ArticleRe: Scripts 관련 초보 질문 입니다.
If (ValidateServer(pcbDoc) = 1) Then Dim Comps Dim fso Dim outFile Dim myArray() Dim j Dim cellarray(), coordarray(), refdesarray() Set fso =...
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Re: X-ENTP VX.1, display control, shadow mode
Hello Micheal, Actually there is still a possibility to turn 'Shadow Mode' on and off, but it is not in the 'Display Control' From the 'Menu bar' select 'Analysis --> Analysis Control'. The...
View Articlesimulated and practical rise time comparison
Hi All, I have the following two plots (a) practical measurement and (b) simulated measurement. In hyperlynix I have made sure I used all the correct IBIS models and entered the PCB stack-up correctly....
View ArticleI need to move component from PADS into Altium Designer
Hello. I need to "share" component from PADS Layout to someone who uses Altium Designer. Generating gerber data from such component doesn't solve this topic, because user of Altium Designer is not able...
View ArticleRe: Sometimes PADS logic sends through "random" clearance rules during an ECO...
Kirk,I have an open SR and DR on a similar (maybe the same) issue. Rules do not port correctly from PADS Logic to PADS Layout; DRC checks don't catch the violations. The SR has been open since May...
View ArticlePackager wont open
I am working in EE7.9.5 on a schematic. When I go to packager tool under the tools dropdown menu, the text window on the bottom opens but the menu does not. I am not able to package my design. Where do...
View ArticleDDRx Batch Simulation Issue
Hello, I am trying to run a DDR simulation and I get the following errors: I have updated the IBIS file on the Processor IC to list the DQS & CLK signals as differential and I went into...
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Multi-crimp on Ring Terminal
Hello, How would I represent a double crimped terminal in Harness XC? I attempted to draw two bundles going to the same terminal, but only one bundle seems to take the path. Thanks!Lorena
View ArticleRe: Custom Designer(Synopsys EDA tool) & Calibre LVS problem.
Hi TaeJin, The layout netlist shows only numbers for the nets, no names at all. This might be related to your missing ports. Calibre LVS usually looks for text objects in the layout database to use for...
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