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Re: SI simulation differs with real measurement a lot
Hi Nate, I've had a very similar issue recently. It turns out that the IBIS model provides two slew rates, the slow one being the default. In my case I need to pick the fast slew rate. Once I made the...
View ArticleHeader vs. Socket - Naming
What is a more common way to name a header or socket? I've been calling headers hdr2x13 but what about a socket?Thanks
View ArticleRe: CHS Licensing Error
There's a lot of information on this message if you search for it. For example: Cannot start the service "Interactive Services Detection" in - Microsoft Community
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Making PCB with concurrent design enabled xpedition project
Hi all,How can I make the layout project for a concurrent design enabled xPedition project ? When I tried to make the layout file at the server location it give me an error. What is the solution for...
View ArticleRe: Change implicit power supply definitions on schematic level
It seems you have a hybrid setup based on the ODA parts. If you are using the Integrated flow with a Central Library then the Supply Rename is used to override power/ground pins defined implicitly in...
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Re: How to export global signal names from DxDesigner?
The dialog shown is for the VX.1 version of software, it was re-arranged and a couple of bugs/enhancements made, but generally they work the same.
View ArticleRe: Where has my Connections Stream gone?
Community_Admin Is there any chance that the Community interface can be changed to provide a link to 'News' from the main menu bar?It seems that this is now the preferred mechanism for the Jive...
View ArticleQuestaSim pli simulation cannot find symbols
I am using QuestaSim for Verilog simulation. The simulation need some systemC functions for co-simulation. Here's where I encounters the problem: First I compile the .C file into .o file...
View ArticleError in diablo function "..\sym\AL8807.mod(49): error -- Error in DIABLO...
Hello I have problems simulating simple schematic contains few capacitors, LEDs, resistors, two diodes,... and buck LED driver (AL8807). I downloaded SPICE models for most of the parts and also for...
View ArticlePADS Integrated Flow with DxDataBook
Looking a making the jump from DxDesigner Netlist flow to the PADS Integrated flow for our design team? Has anyone made a successful transition? Was it very difficult for you? Any problems that you ran...
View ArticleInterfacing a Custom Interface PCB with test fixture with double-sided nails
Hello All, We are using PADS Layout 9.5 to design a custom interface PCB to interface with a UUT using a test fixture with double-sided nails. This means that the bed of nails will touch test points...
View ArticleMissing Start Menu application links - Pads 9.5
While trying to install a renewal license, all but a couple of the Start Menu links disappeared under Mentor Graphics SDD. Do I need to run through the product installation again to get them back or...
View ArticleRe: Interfacing a Custom Interface PCB with test fixture with double-sided nails
Hi Gabe, I can't say I know how to do this off the top of my head, but I think Automation can handle this. You probably want to check the PADS Layout Command Reference Manual but I can see some code...
View ArticleRe: Is the PADS ES suite the same as PADS Standard Plus?
Hi, In the PADS Standard Plus, is Logic for design entry available? Is a license for Logic included? I know in VX1, you need to download it separately. Danny
View ArticleLogic part type defined as PWR, allows GND net to connect to it?
If in Logic and build a part, in the pins tab I have a pin type of Ground. When adding connections in Logic, I noticed I can connect a Ground net to the Power pin. Is there a DRC check to make sure...
View ArticleRe: Making PCB with concurrent design enabled xpedition project
Hello, I don't know if you have enough information to provide a good response. Looks like you want to use Xtreme on this project however the message you show is from the Job Wizard. This message...
View ArticleRe: Plane shape couldn't connect vias/pin
Hello, Have you verified that the layer/Net combination in Plane Assignments is set to be dynamic allowing the metal to be generated? Looks like to me the state is draft/static for the layer/net thus...
View ArticleRe: How to check for maximum clearance?
Hello, You can use the Mask Generator to do this check. Extract one of the nets, expand by the max clearance and use the subtract operation with the other trace. The result should be areas where the...
View ArticleRe: xPCB Draw Object Snap Grid problem
Hello, I agree with Vern, it would be best to contact CSD with such a question. Based on what I see, to me it appears the line at 45 degrees is already not on the grid defined. If you have an object...
View ArticleRe: How to add 3D models to cells in CENTRAL library?
Hello, This is a good question. If your not using xDM Library (old DMS) you can not import/map and align 3D models at the library level. The 3D Library Flow requires the xDM Library (DMS) system to...
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