Most users typically do a sync from the VeSys wiring design to the VeSys Harness design to bring the multicore structure to the harness drawing, and they just need for the parent MC outer diameter to be exported in the nwf file so that it contributes to the true bundle OD in Creo. For this reason, they typically don't care too much about the shielding in Creo. However, for user that do care, we have a means to configure its export into the nwf.
At <VeSys_install>\adaptors\resources is the vesys_bridge.properties file. In it, set property Shield_as_wire=true. This will convert that shield (in the first pic) to a wire and will export it (Remove_shield=false). As you know, the nwf format does not support nestings within a MC instance, and so VeSys supports "flattening" it out. For this, set Flatten_out_nested_multicore=true. Restart VDesign, so that the new values are read in. Export the nwf, and you will see that the shield is now exported.
If you have MC nestings in VDesign, they will not be present in Creo, but the MC will be created to the OD of the parent level, thus giving you an assurance that the bundle OD in Creo is true to reality. Eventually, when you do a sync of the wiring from VDesign to VHarness, the MC nestings in the wiring design will be replicated in the harness drawing.