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Re: Error on generation of Cadence Allegro 15.Xx netlist generated from DX designer

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Ok. We will initiate the thread with support team.

 

meanwhile I have generated netlist for PADs. it is generating netlist with 0 error.

 

I have put below property in attribute

 

DEVICE = our parts 10 digit no (like : C1 184-0518-070)

PKG_TYPE = component FP name ( FP name=CT2917)

 

Here is my ascii file,

====

!PADS-POWERPCB-V9.0-MILS!

 

 

*PART*

C1 184-0518-070@CT2917

C2 184-0518-070@ct2917

C3 184-0518-070@ct2917

C5 184-6344-230@CT2917

C9 184-6344-230@CT291

============================

Without PKG_TYPE attribute it generates  below method. it shows the attribute instead of PKG_TYPE.

C1 184-0518-070

 

Can you please help me on this ?


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